1. Technical Field
This invention relates in general to managing processor core performance and more particularly to tracking pipelined activity during off-core memory accesses to evaluate the actual impact of a frequency change on one or more processor cores.
2. Description of the Related Art
Power issues and thermal issues are design constraints for high-performance computer systems. Energy consumption and heat dissipation within a high-performance computer system impacts the potential performance gains that could be achieved from other design improvements such as increasing transistor densities and increasing clock speeds.
To minimize energy consumption while maintaining high performance, a power performance controller may be designed into a high-performance computer system to control running system components at lower power states, without impacting performance. Dynamic Voltage and Frequency Scaling (DVFS) is a common technique for managing power in a high-performance computer system. DVFS allows for adjusting the core frequency at which processors are running to reduce the power state of the components.
In a computer system, workloads include compute-bound workloads that are progressing within a processor core and memory-bound workloads that are waiting for memory accesses to off-core memory. In general, computer system performance tracks linearly with processor core frequency for workloads that are compute-bound, and therefore limited by CPU speed, and is nearly independent of processor core frequency for workloads that are memory-bound, and therefore limited by memory bandwidth and latency, which are unrelated to CPU speed. Within a high-performance computer system implementing processors that allow multiple workloads to execute simultaneously, however, the actual working relationship between frequency, and the resulting performance, is variable, rather than linear.